Synthesis of linear sequential machines

Synthesis of Linear Sequential Machines with Unspecifed Outputs

R70-42 Synthesis of Linear Sequential Machines with Unspecified Outputs

This paper is yet another solution for finding linear internal state assignments for the next-state behavior of a sequential machine. A state assignment is said to be linear if and only if the resulting next-state variables are linear combinations ofthe present-state and input variables. Consequently, the next-state behavior of a sequential machine is said to be linear if and only if there exis...

Synthesis-for-Initializability of Asynchronous Sequential Machines

We present a new method for the synthesis-forinitializability of asynchronous state machines. Unlike existing approaches, our method incorporates a state assignment step. State assignment is critical, since initializability may be precluded by poor choice of state assignment. Also, we present precise conditions on hazard-free logic, to insure that the circuits are physically initializable.

Irredundant sequential machines via optimal logic synthesis

optimal sequential logic synthesis can produce fallv testable nonscan finite state machines. Test generation algorithms can be used It is well known that optimal logic synthesis can ensure fully to remove all the redundancies in sequential machines resulting in testable combinational logic designs. In this paper. we show that fuily testable designs. However. in general. this method requires opt...

Stochastic Sequential Machines Synthesis with Application to Constrained Sequence Generation

In power estimation, one is faced with two problems: 1) generating input vector sequences that satisfy a given statistical behavior (in terms of signal probabilities and correlations among bits); 2) making these sequences as short as possible so as to improve the efficiency of power simulators. Stochastic sequential machines (SSMs) can be used to solve both problems. In particular, this paper p...